The RISC-V Taiwan Alliance stated that the design and applications of RISC-V in AI was one of the main topics in RISC-V Summit Europe (June 2024) and RISC-V Summit China (August 2024). From defining the instruction set architecture, hardware implementation to AI software; many companies are exploring the innovative design of RISC-V in AI processors. The high development of RISC-V coincides with the rise of AI (especially edge AI), which will provide great opportunities for Instruction Set Architecture (ISA). For example, one of the key trends in recent times has been Samsung that opened up an R&D Lab in Silicon Valley to develop RISC-V AI chips.

According to a research by the SHD Group, the total RISC-V SoC market revenues reached USD 6.1 billion in 2023, a growth of 276.8% from 2022. The value is expected to grow to USD 92.7 billion by 2030, a CAGR of 47.4%. A report by Omdia predicts that the application of RISC-V in AI will grow rapidly and the report estimated that by 2030, more than 500 million devices of various types will use AI accelerators based on the RISC-V architecture. From these numbers, it is reasonable to estimate that the growth rate of RISC-V processor shipments from 2024 to 2030 will be 50% annually and reach 17 billion by 2030.

In her blog titled “RISC-V: An Open Standard – Backed by a Global Community – to Enable Open Computing for All”, the CEO of RISC-V International, Calista Redmond stated that RISC-V is the defined open standard Instruction Set Architecture for computing. This means new questions will have to be considered to; such as how to realize AI in various industries, what technical specifications and changes will the cloud-to-end AI chip processor bring to the chip design?

In this year’s RISC-V Taipei Day, Frankwell Lin, Chairman of RISC-V Taiwan Alliance and Chairman and CEO of Andes Technology will open the event with a speech titled “RISC-V: More than AI”. Mr. Lin will be joined by Lu Dai, Board Chair of RISC-V International; Dr. Charlie Su, President and CTO of Andes Technology; Wei-Han, Lien, Chief CPU Architect and Senior Fellow of Tenstorrent; and Mark Hayter, Chief Strategy Officer & Co-Founder of Rivos Inc. who will deliver their own keynote speeches as well as a panel discussion. 

2024 RISC-V Taipei Day will also feature a host of other speakers including Ted Speers, Technical Fellow of Microchip Technology; Travis Lanier, Chief Product Officer of Ventana Micro Systems Communications Inc.; Barna Ibrahim, Vice Chair of RISE Project; Dr. Stewart Wu, Chairman, President and Chief Executive Officer of Metanoia Communications Inc.; Ming Chih, CEO of Chelpis Quantum Corp.; and more industry leaders who will deliver keynote speeches and join panel discussions in the event; discussing the recent technological breakthroughs and market observations on RISC-V.

In the event venue, more than 20 companies and industry-university-research teams including Industrial Technology Research Institute (ITRI) PQC, RISE, RIVOS, Andes, Powerchip, Tenstorrent, Metanoia Communications, Southern Taiwan Industry Promotion Center (STIPC), RISC-V Taiwan Alliance LLM SIG and Platform SIG, T-KI, and more will organize booths to provide visitors and exhibitors with networking opportunities and share development results and technology trends.