Reshape the Future with AI

AI 發展已經到了一個關鍵的轉折點。大語言模型(LLM)最近引起了極大的關注,並且需要大量計算來進行AI 模型訓練和推理。在當前AI時代,IC設計將面臨巨大的挑戰,想藉著不斷縮小半導體工藝來滿足性能、功耗、面積和成本的目標,將會越來越困難。巨大的計算需求帶來了高性能、高頻寬和高能源效率的需求,複雜的IC設計也增加了設計成本和對高技能人才的需求。

當然AI 也帶來新的機會。AI 可以為IC產品賦予新的功能,同時也有可能成為IC行業提高效率的關鍵工具。此外,開源處理機架構可以提供強大而靈活的設計元件來實現複雜的AI運算架構。這些都為IC產業帶來了革命性的新機遇!

2024年9月10日至11日將於新竹晶宴會館舉辦 “Reshape the Future with AI”系列活動,包含9月10日由TICD與Accellera所主辦的2024 DVCon Taiwan,以及9月11日則由台灣RISC-V聯盟所主辦的 2024 RISC-V Taipei Day。本系列活動極具價值,非常歡迎任何有興趣瞭解最先進 IC技術的人參與。

報名參加

DVCon Taiwan 2024

DVCon為世界IC設計驗證相關領域最大型會議,去年第一次引進台灣舉行。本屆將舉辦實體會議,在會期中,大會亦規畫了展覽活動,藉以增進產學界之互動與交流。希望藉由一整天的特邀演講、高峰論壇、課程及論文發表等議程,就當前積體電路設計及驗證所面臨的新挑戰、新議題,集合各方知識智慧、相互激勵創新,並促進產、學、研等各界人員交流,進而提升設計驗證科技研究與產業創新發展之競爭力。特此誠摯邀請您共同參與DVCon Taiwan 2024。
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RISC-V Taipei Day

2023年可以說是RISC-V蓬勃發展的一年,除了高通、恩智浦、英飛凌、BOSCH與Nordic等大廠,宣布在車用電子方面合資打造 RISC-V架構的五眼聯盟,Meta也在5月揭露了首款使用 RISC-V 開源晶片架構打造的AI晶片「MTIA」,預計於2025年正式推出;Google也宣布Android未來將支援RISC-V 架構,除此之外,由非營利性 Linux 基金會發起的開源軟體發展專案RISE,包括三星電子、輝達、英特爾、Google和高通等全球IT和半導體巨頭,更是紛紛表態加入RISC-V陣營!

9月11日,歡迎參與由台灣RISC-V聯盟主辦的 2024 RISC-V Taipei Day,我們將邀請重磅級國內外半導體專家親自剖析RISC-V這一年以來的技術進展,共同解鎖RISC-V開源處理器架構在AI時代,如何為複雜的IC系統與AI運算架構賦能,啟動計算新革命!

精彩議程


Welcome

Track 1, Track 2

Opening

Track 1, Track 2

Steering Committee

Keynote 1

Track 1, Track 2

Alessandra Nardi PhD – Chair of Accellera FuSa Working Group and Executive Director of System Solutions Group in Synopsys

Keynote 2

Track 1, Track 2

Cadence

Keynote 3

Track 1, Track 2

Siemens

Morning Break

Track 1, Track 2

Panel Discussion

Track 1, Track 2

Moderator: M. V. Achutha Kiran Kumar, Intel

Lunch Break

Track 1, Track 2

Session 1.1

Track 1

Truechip

Session 1.2

Track 1

AMD

Session 1.3

Track 1

Andes

Session 1.4

Track 1

Andes

Afternoon Break 1

Track 1, Track 2

Session 1.5

Track 1

Silicon Interface

Session 1.6

Track 1

Synopsys

Session 1.7

Track 1

MediaTek

Session 1.8

Track 1

Cadence

Afternoon Break 2

Track 1, Track 2

Award and Closing Session

Track 1, Track 2

Session 2.1

Track 2

TESDA

Session 2.2

Track 2

NTHU

Session 2.3

Track 2

Synopsys

Session 2.4

Track 2

Synopsys

Afternoon Break 1

Track 1, Track 2

Session 2.5

Track 2

Cadence

Session 2.6

Track 2

Cadence

Session 2.7

Track 2

Siemens

Session 2.8

Track 2

Siemens

Afternoon Break 2

Track 1, Track 2

Award and Closing Session

Track 1, Track 2

Welcome and Registration

RISC-V: More Than AI

Mr. Frankwell Lin|Chairman, RISC-V Taiwan Alliance (Chairman and CEO, Andes Technology)

RISC-V penetrated all aspects of application, including but not limited to AI. In this report, RISC-V application will be discussed, AI, certainly, but also Application processor, High performance Computing, Data Center, Storage, Automotive, Networking, Personal Computing, IoT, 5G, and so on. The base is RISC-V fast evolution of its ISA extension, specifications, and features. RISC-V International Association also promoted RISC-V to all over the world. In terms of value chain, RISC-V based SoC will start to penetrate OEM and ODM, since major world brands joined in, that lead the wave of RISC-V adoption. Many RISC-V eco-system, IP and chip providers join in 2024 RISC-V Taipei Day event, to jointly develop and contribute to tomorrow's plan of Taiwan's industry value.

Welcome Remark

Dr. Alex Wang|Chairman, Taiwan IoT Technology and Industry Association, TwIoTA

Welcome Remark

TBD

VIP Photo

Architecture of Choice for AI

Lu Dai|Board Chair, RISC-V International (Senior Director of Technical Standards, Qualcomm Technologies, Inc.)

Keynote 2

Mark Hayter|Chief Strategy Officer & Co-Founder, Rivos Inc.

The Golden Age of Computer Architecture with MIcrochip and RISC-V

Ted Speers|Technical Fellow, Microchip Technology

Microchip's RISC-V journey began in 2015.  It soon became evident that RISC-V was just one component of an expansive vision for the post-Moore world that David Patterson and John Hennessy articulated in their 2017 Turing Lecture entitled 'A New Golden Age for Computer Architecture'.  This talk will give a progress report on the Golden Age, make projections on where it is headed, and illustrate how Microchip is poised bring the Golden Age to the Intelligent Edge.    

Keynote 4

Balaji Baktha|Founder and CEO, Ventana Micro Systems

Break & Exhibit Tour

Panel Discussion

Moderator: TBC

Panelist:

Frankwell Lin|Chairman, RISC-V Taiwan Alliance; Chairman and CEO, Andes Technology

Lu Dai|Senior Director of Technical Standards, Qualcomm Technologies, Inc.

Mark Hayter|Chief Strategy Officer & Co-Founder, Rivos Inc.

Ted Speers|Technical Fellow, Microchip Technology

Balaji Baktha|Founder and CEO, Ventana Micro Systems

Lunch/Exhibit Tour

Leveraging RISC-V Solutions for Intelligence Everywhere

Dr. Charlie Su|President and CTO, Andes Technology

While the rising RISC-V architecture has been adopted in applications such as automotive, connectivity, 5G, networking, storage, sensor processing, RISC-V solutions for AI/ML from edge to cloud seems to most blooming. As AI/ML continues to be the main driver of global semiconductor industry at least for the next several years, it creates further opportunity for RISC-V growth due to its extensibility to quickly support the latest innovations in AI/ML.

In this speech, we will first introduce RISC-V's successful stories in various AI/ML applications. We will dive into a couple examples of how RISC-V solutions accelerate transformer models and large-language models. They leverage RISC-V Vector extension, P (SIMD/DSP) extension and custom extension, are based on IREE compilation, llama.cpp inference framework, executorch runtime and XXNPACK operators, and use popular MobileBERT model, TinyLlama model and Llama 7B model as benchmarks. We will look into RISC-V support in the relevant key ecosystem. We will also cover Andes integrated solution stack AndesAIRE™ with those necessary pieces.

Tech Talk 2

LLM SIG

Break / Lucky Draw 1

Platform SIG

Tech Talk 3

Panel Discussion

Moderator: TBC

Panelist: TBC

Break / Lucky Draw 2

Closing & Networking

Welcome and Registration

Tutorial 1

Truechip

Tutorial 2

Baum

Tutorial 3

Perforce

Break

Tutorial 4

Lunch / Exhibit

Tutorial andPoster Presentation

貴賓介紹

贊助夥伴

DVCon Taiwan 2024

RISC-V Taipei Day

Special Partner

聯絡我們

台灣RISC-V聯盟
RISC-V TAIWAN ALLIANCE(RVTA)
王小姐

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協辦單位