Online is convenient and it has saved us during the pandemic, but you can’t beat in-person class! That immersive feeling of hands-on and the shared mission with colleagues all trying to master the same subject. As part of our global series of workshops to “train the teachers” how to use RISC-V in computer architecture courses and the design of systems on chip (SoCs) we are thrilled to present a free training on December 15, 2022 as part of the 2022 RISC-V Summit. Our RVfpga partners, including Digi-Key are working with us to make this possible!
To do this, we are asking for a day of your time so that you can empower the next generation of computer science and engineering students to get real-world expertise in computer architecture and the RISC-V instruction set architecture.
What is RVfpga about?
This RVfpga workshop presents a commercial RISC-V system targeted to an FPGA, discusses the theory, architecture, and course structure, and shows how to use the hands-on labs as part of the complete RVfpga course. The course explores the fundamentals of computer architecture using Western Digital’s open-source, fully verified, already in-silicon, SweRV EH1 RISC-V core targeted to a Xilinx Artix 7 FPGA on Digilent’s Nexys A7 development board.
Everyone will get hands-on experience with the FPGA platform and the software tools, enabling a fast start when you return to your university. The SweRV is not an “education core” it’s real-world, used inside Imagination’s GPUs and Western Digital’s solid-state drives.