Uppsala, Sweden – December 15, 2022 – IAR Systems®, world leader in software and services for embedded development, and Gaisler, the fault-tolerant processor design center of CAES, are pleased to announce the start of a new partnership. IAR Systems will soon release a new version of the IAR Embedded Workbench for RISC-V. The new version will have support for NOEL-V, the RISC-V space grade processor from Gaisler. 

The NOEL-V is a synthesizable VHDL model of a processor implementing the RISC-V architecture. It is highly configurable, and it offers profiles going from high-performance Linux-capable architectures to area-optimized micro-controller solutions. The NOEL-V is also designed to include fault tolerant features that allow it to run software without interruptions, correcting automatically faults due to the radiation naturally present in the space environment.

The IAR Embedded Workbench for RISC-V is a complete development toolchain that provides developers with everything they need in one easy-to-use integrated development environment. The toolchain offers extensive debugging capabilities, including multi-core debugging and analysis possibilities such as complex code and data breakpoints, runtime stack analysis, call stack visualization and code coverage analysis.

The IAR I-jet debug probe provides an efficient debug interface with NOEL-V systems, making use of the standard RISC-V JTAG debug interface, which will be also available in the next release of the freely downloadable NOEL-V FPGA example bitstreams, in December 2023.

Read the full announcement here.