IC Tech in the AI Era

The development of AI computing has reached a critical inflection point. Large-language models (LLMs) attract tremendous attention recently and require huge computation for AI model training and inference. In the AI era, IC design now faces tremendous challenges. It’s more difficult to continuously shrink semiconductor process to meet the targets on performance, power, area, and cost. Huge computing requirements led to high performance, bandwidth, and energy efficiency. Complex IC designs also increase the design costs and demands on highly skilled talents.

At the same time, AI also enables new opportunities. AI can create new functions in IC products and become crucial tools to increase the design efficiency of the IC industry. Meanwhile, open source processor architectures can provide powerful and flexible building blocks to realize complex AI computing architecture. These together have brought revolutionary new opportunities for the IC industry.

On October 12th, join us for the most influential IC industry event "IC Tech in the AI Era" forum at Taipei International Convention Center (TICC) and explore these topics with us. In the morning session, “CASIF Taipei 2023” hosted by IEEE CASS Taipei, will discuss the challenges of IC design in the AI era. Through technical speeches from TSMC and MediaTek, as well as panel discussion with panelists representing industry, academia, and research institutes, we will discuss the future directions and opportunities of IC design in this new and exciting era. The afternoon session is “2023 RISC-V Taipei Day”. Hosted by RISC-V Taiwan Alliance (RVTA), the forum will explore how the RISC-V open source processor architecture can empower complex IC systems and AI computing architectures in the AI era. These valuable events are free to participate and we sincerely welcome everyone interested in state-of-the-art IC technology to attend. Lunch will be provided between the two events.

We especially recommend you to join the “YST Forum” held by TIARA (Taiwan Semiconductor Industry-University R&D Alliance) in the morning of 10/13 (Friday) which will be held on the 2nd floor at Taipei World Trade Center (TWTC) during the TIE EXPO 2023. The YST Forum will focus on helping young talents understand their career path on the IC and semiconductor fields.





Dr. Bor-Sung, Liang|Senior Director, MediaTek (Chair, IEEE CASS Taipei)

Remarks & Photo

Dr. Chia-Lin, Yang|Deputy Executive Secretary, Office of Science and Technology Policy (OSTP), National Science and Technology Council (NSTC)

Dr. Chyou-Huey, Chiou|Director General, Department of Industrial Technology, Ministry of Economic Affairs

Introduction of IEEE CAS Society

Dr. Kea-Tiong (Samuel), Tang|Professor, EE, National Tsing Hua University (Vice President, Regional Activities and Membership, IEEE CASS RAM (Region 10))

Challenges in Advanced IC Design Industry: From Technology to Talents

Dr. Meng-Fan (Marvin), Chang|Director, Corporate Research, TSMC

Host: Dr. Bor-Sung, Liang|Senior Director, MediaTek

The increasing demand for advanced IC design necessitates innovation across the entire semiconductor technology stack. Recent breakthroughs in CMOS technology, 3D-IC, and memory-wall issue show great promise. To further propel technological advancement, it is imperative to address the global talent shortage in the semiconductor industry through collaboration between industry and academia to incubate new talent.

Edge AI Application Evolution – Opportunity and Challenge

Dr. Allen Lu|Assistant General Manager, Computing and Artificial Intelligence II FU, MediaTek

Host: Dr. An-Yeu (Andy), Wu|Professor, EE, National Taiwan University (Director, MediaTek-NTU Research Center | Fellow, IEEE)

Over the years, edge AI has made significant strides, transitioning from applications like photo classification and face detection to enhancing video and gaming picture quality. The advent of generative AI has further propelled innovation, revolutionizing our life experiences. However, due to intensive computational and memory requirements, current generative AI applications primarily rely on cloud infrastructure.

In this presentation, we aim to explore the emerging trend of shifting from a cloud-centric approach to a collaborative cloud-edge paradigm for generative AI technologies. We will delve into the multitude of opportunities and challenges that lie ahead when supporting generative AI on edge devices. This transformation entails a synergetic blend of technological advancements, enhancements in hardware architecture, and the reduction of computational complexities, ultimately enabling the realization of novel generative AI applications.

Panel Discussion
Taiwan's AI Computing Journey: Challenges and Opportunities


Dr. Shih-Chieh, Chang|General Director, Electronics and Optoelectronic System Research Lab, ITRI


Dr. Chen-Yi, Lee|Vice President, National Yang Ming Chiao Tung University

Dr. Meng-Fan (Marvin), Chang|Director, TSMC

Dr. Allen Lu|Assistant General Manager, Computing and Artificial Intelligence II FU, MediaTek

Mr. Frankwell Lin|Chairman and CEO, Andes Technology

Dr. Tuo-Hung (Alex), Hou|Director General, Taiwan Semiconductor Research Institute (TSRI)

Welcome and Registration

Opening : RISC-V is Leading Technology in the World

Mr. Frankwell Lin|Chairman, RISC-V Taiwan Alliance (Chairman and CEO, Andes Technology)

RISC-V has stood on par with x86 and ARM, establishing itself as one of the three leading global instruction sets for the coming several decades, making it the preferred choice for embedded system chip designers. The RISC-V International and the worldwide community of experts have contributed RISC-V new specifications and instruction sets, propelling RISC-V processors towards a more comprehensive distribution. This presentation will elaborate on the efforts and achievements of the RISC-V International in launching new specifications and instruction sets for RISC-V processors. The speaker will discuss various leading domains emphasized in recent years, along with the applications and products introduced by companies globally introducing processors and SoCs. Additionally, the presentation will conclude by highlighting the continuous efforts towards establishing a more robust RISC-V ecosystem and maintaining RISC-V's worldwide leadership.

Welcome Remark

Dr. Chih-Peng, Li|Director General, Department of Engineering and Technologies, NSTC

Dr. Alex Wang|Chairman, Taiwan IoT Technology and Industry Association, TwIoTA

Group Photo


Lu Dai|Board Chair, RISC-V International (Senior Director, Technical Standards, Qualcomm)

RISC-V is Inevitable

Ms. Calista Redmond|CEO, RISC-V International

RISC-V adoption has accelerated across domains, from embedded to enterprise, from automotive to HPC. RISC-V has grown faster than any other architecture in history with both technical and business advantages. We are in the era of open computing as opportunities for custom microprocessors grow exponentially and barriers to innovation and markets are overcome through collaboration. Join me to hear about the success of RISC-V across industries, geographies, and stakeholders. We’ll take a look at thought leaders ranging from multinationals to start-ups and the progress they’re making both independently and collaboratively. You’ll come away with an understanding of the technical advantages, business variables, and explosive opportunity that have compelled investment and engagement in the RISC-V community as we together drive commercialization and adoption of RISC-V everywhere.

Bridging the Divide: Unifying RISC-V through Binary Translation

Dr. Philipp Tomsich|Technologist and Founder of VRULL(Chair of the Applications & Tools Committee, RISC-V International)

In the ever-evolving landscape of RISC-V ISA, binary translation emerges as a critical enabler for its continuous evolution and innovation, effectively managing the potential fragmentation that accompanies the introduction of new extensions and instructions. This ensures seamless backward compatibility and accelerates RISC-V adoption by offering effortless migration from legacy architectures.

Binary translation is a well-established technology with widespread high-profile implementations. Recognized as an infrastructure or "public utility," it demands open-source accessibility to maximize its benefits for the entire RISC-V community. To spearhead the development and ongoing stewardship of a free and open multi-ISA binary translation framework, we have recently launched a non-profit initiative.

Scalable RISC-V for Digital Transformation

Wei-Han, Lien|Chief CPU Architect and Senior Fellow Architecture, Tenstorrent

The human race is entering an era in which digital technology is profoundly transforming every aspect of human life. Digital transformation refers to the use of digital technologies to revolutionize business operations and enhance customer experiences. It involves adopting innovative tools and strategies to improve efficiency, agility, and competitiveness in an increasingly digitized world. In this context, RISC-V, an open-source instruction set architecture (ISA), can play a significant role.

RISC-V offers customization, flexibility, and vendor independence, making it valuable for organizations embracing digital transformation. Its open-source nature allows businesses to design, modify, and implement processors based on RISC-V specifications without proprietary licensing constraints. This enables the creation of processors tailored to specific workloads, optimizing performance, energy efficiency, and cost-effectiveness.

By lowering entry barriers for semiconductor startups and companies, RISC-V fosters innovation and the development of specialized hardware solutions. This adaptability makes it suitable for integrating with emerging technologies like AI and IoT, making RISC-V a foundational technology for digital transformation initiatives seeking to leverage these innovations.

Tenstorrent's RISC-V processor can further enhance the digital transformation journey with its advanced capabilities and unique features. Tenstorrent develops AI processors based on the RISC-V architecture. AI is a crucial component of digital transformation, and Tenstorrent's RISC-V processor is designed to excel in handling AI workloads. Tenstorrent’s wide-range of superscalar RISC-V IP's support cloud computing/storage servers, enable edge computing for real time power-efficient processing, and support connecting IoT devices to gather data essential for digital transformation.

By combining the strengths of RISC-V with a specialized focus on AI and data processing, Tenstorrent's RISC-V processor is positioned to accelerate digital transformation initiatives. Its ability to handle AI workloads efficiently, support edge computing and IoT devices, enable data analytics, promote customization, drive innovation, and enhance security makes it a valuable asset for organizations seeking to leverage AI and data-driven insights to transform their businesses.

Extending RISC-V Intelligence from Cloud to Edge

Dr. Charlie Su|President and CTO, Andes Technology

Equipped with RISC-V's powerful Vector ISA and automated customer extension framework, Andes solutions have been adopted in over a dozen innovated datacenter AI/ML accelerators such as Meta’s MTIA first generation silicon. At the same time, the needs for intelligence or more intelligence are fast rising in many edge applications such as ADAS, AR/VR, 5G base stations, SSD Storage, and even general-purpose MCU/MPU. AI/ML is used to improve existing features such as noise reduction for earbuds and picture enhancement for image sensor processors as well as to apply to new areas such as 5G network optimizations.

In this talk, we will discuss the rising demands for intelligence everywhere, and illustrate existing solutions for the Cloud AI and how they are being adopted in the edge applications, using AndesAIRE™ (Andes AI Runs Everywhere) solutions as an example.

Trends in AI & Automotive: Personalization, Privacy, Data Protection, and LLM on RISC-V

William Wei|CMO & EVP, Skymizer

The AI & automotive industry are both undergoing a major transformation. AI is being used to improve safety, efficiency, and comfort in vehicles, and it is also being used to create new personalized experiences for drivers and passengers. Also, Automotive industry has been trying to transform cars into AI enabled Software Defined Vehicles (SDV).

The latest trend in AI is the use of large language models (LLMs) and foundation models as the next generation AI Infrastructure to power advanced features on AI SoC. LLMs are trained on massive datasets of text and code, and they can be used to perform a wide range of tasks with even reasoning capability. One of the advantages of using RISC-V for AI SoC to run LLMs is that it is an open architecture. This means that it is not controlled by a single company, which makes it more secure and reliable with freedom in design.

One of the key challenges in the development of AI-powered vehicles is the need to protect user privacy and data. As vehicles collect more and more data about their surroundings and their occupants, it is important to ensure that this data is secured and not misused.

In this presentation, we will discuss the latest trends in AI & Automotive, with a focus on personalization, privacy and data protection. We will also discuss the advantages of using RISC-V for AI SoC to run LLMs.

Keywords: AI, Automotive, LLM, RISC-V, privacy, data protection


Panel Discussion


Prof. Tien-Fu, Chen|Associate Dean / Professor, Department of Computer Science, National Yang Ming Chiao Tung University


Dr. Philipp Tomsich|Founder and Chief Technologist, VRULL

Mr. Wei-Han, Lien|Chief CPU Architect and Senior Fellow Architecture, Tenstorrent

Dr. Charlie Su|President and CTO, Andes Technology

Mr. Jim Lai|Chairman of the Board, Skymizer

Mr. Thomas Li|VP of Engineering, System Design Group, Synopsys

Mr. Michael Wang|Associate Vice President, Corporate Marketing, UMC

Closing and Networking




RISC-V Taipei Day

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