RISC-V has stood on par with x86 and ARM, establishing itself as one of the three leading global instruction sets for the coming several decades, making it the preferred choice for embedded system chip designers. The RISC-V International and the worldwide community of experts have contributed RISC-V new specifications and instruction sets, propelling RISC-V processors towards a more comprehensive distribution. This presentation will elaborate on the efforts and achievements of the RISC-V International in launching new specifications and instruction sets for RISC-V processors. The speaker will discuss various leading domains emphasized in recent years, along with the applications and products introduced by companies globally introducing processors and SoCs. Additionally, the presentation will conclude by highlighting the continuous efforts towards establishing a more robust RISC-V ecosystem and maintaining RISC-V's worldwide leadership.
RISC-V adoption has accelerated across domains, from embedded to enterprise, from automotive to HPC. RISC-V has grown faster than any other architecture in history with both technical and business advantages. We are in the era of open computing as opportunities for custom microprocessors grow exponentially and barriers to innovation and markets are overcome through collaboration. Join me to hear about the success of RISC-V across industries, geographies, and stakeholders. We’ll take a look at thought leaders ranging from multinationals to start-ups and the progress they’re making both independently and collaboratively. You’ll come away with an understanding of the technical advantages, business variables, and explosive opportunity that have compelled investment and engagement in the RISC-V community as we together drive commercialization and adoption of RISC-V everywhere.
In the ever-evolving landscape of RISC-V ISA, binary translation emerges as a critical enabler for its continuous evolution and innovation, effectively managing the potential fragmentation that accompanies the introduction of new extensions and instructions. This ensures seamless backward compatibility and accelerates RISC-V adoption by offering effortless migration from legacy architectures.
Binary translation is a well-established technology with widespread high-profile implementations. Recognized as an infrastructure or "public utility," it demands open-source accessibility to maximize its benefits for the entire RISC-V community.
To spearhead the development and ongoing stewardship of a free and open multi-ISA binary translation framework, we have recently launched a non-profit initiative.
The human race is entering an era in which digital technology is profoundly transforming every aspect of human life. Digital transformation refers to the use of digital technologies to revolutionize business operations and enhance customer experiences. It involves adopting innovative tools and strategies to improve efficiency, agility, and competitiveness in an increasingly digitized world. In this context, RISC-V, an open-source instruction set architecture (ISA), can play a significant role.
RISC-V offers customization, flexibility, and vendor independence, making it valuable for organizations embracing digital transformation. Its open-source nature allows businesses to design, modify, and implement processors based on RISC-V specifications without proprietary licensing constraints. This enables the creation of processors tailored to specific workloads, optimizing performance, energy efficiency, and cost-effectiveness.
By lowering entry barriers for semiconductor startups and companies, RISC-V fosters innovation and the development of specialized hardware solutions. This adaptability makes it suitable for integrating with emerging technologies like AI and IoT, making RISC-V a foundational technology for digital transformation initiatives seeking to leverage these innovations.
Tenstorrent's RISC-V processor can further enhance the digital transformation journey with its advanced capabilities and unique features. Tenstorrent develops AI processors based on the RISC-V architecture. AI is a crucial component of digital transformation, and Tenstorrent's RISC-V processor is designed to excel in handling AI workloads. Tenstorrent’s wide-range of superscalar RISC-V IP's support cloud computing/storage servers, enable edge computing for real time power-efficient processing, and support connecting IoT devices to gather data essential for digital transformation.
By combining the strengths of RISC-V with a specialized focus on AI and data processing, Tenstorrent's RISC-V processor is positioned to accelerate digital transformation initiatives. Its ability to handle AI workloads efficiently, support edge computing and IoT devices, enable data analytics, promote customization, drive innovation, and enhance security makes it a valuable asset for organizations seeking to leverage AI and data-driven insights to transform their businesses.
Equipped with RISC-V's powerful Vector ISA and automated customer extension framework, Andes solutions have been adopted in over a dozen innovated datacenter AI/ML accelerators such as Meta’s MTIA first generation silicon. At the same time, the needs for intelligence or more intelligence are fast rising in many edge applications such as ADAS, AR/VR, 5G base stations, SSD Storage, and even general-purpose MCU/MPU. AI/ML is used to improve existing features such as noise reduction for earbuds and picture enhancement for image sensor processors as well as to apply to new areas such as 5G network optimizations.
In this talk, we will discuss the rising demands for intelligence everywhere, and illustrate existing solutions for the Cloud AI and how they are being adopted in the edge applications, using AndesAIRE™ (Andes AI Runs Everywhere) solutions as an example.
The AI & automotive industry are both undergoing a major transformation. AI is being used to improve safety, efficiency, and comfort in vehicles, and it is also being used to create new personalized experiences for drivers and passengers. Also, Automotive industry has been trying to transform cars into AI enabled Software Defined Vehicles (SDV).
The latest trend in AI is the use of large language models (LLMs) and foundation models as the next generation AI Infrastructure to power advanced features on AI SoC. LLMs are trained on massive datasets of text and code, and they can be used to perform a wide range of tasks with even reasoning capability. One of the advantages of using RISC-V for AI SoC to run LLMs is that it is an open architecture. This means that it is not controlled by a single company, which makes it more secure and reliable with freedom in design.
One of the key challenges in the development of AI-powered vehicles is the need to protect user privacy and data. As vehicles collect more and more data about their surroundings and their occupants, it is important to ensure that this data is secured and not misused.
In this presentation, we will discuss the latest trends in AI & Automotive, with a focus on personalization, privacy and data protection. We will also discuss the advantages of using RISC-V for AI SoC to run LLMs.
Keywords: AI, Automotive, LLM, RISC-V, privacy, data protection