精彩議程
報到
Opening
梁伯嵩 博士｜聯發科技 資深處長 (IEEE CASS Taipei 台北分會主席)
Remarks & Photo
楊佳玲 博士｜國家科學及技術委員會 科技辦公室 副執行秘書
邱求慧 博士｜經濟部技術處 處長
Introduction of IEEE CAS Society
鄭桂忠 博士｜清華大學電機系 教授 (IEEE CASS RAM(Region 10) 副總)
Keynote
張孟凡 博士｜台積電 處長
主持人: 梁伯嵩 博士｜聯發科技 資深處長
The increasing demand for advanced IC design necessitates innovation across the entire semiconductor technology stack. Recent breakthroughs in CMOS technology, 3D-IC, and memory-wall issue show great promise. To further propel technological advancement, it is imperative to address the global talent shortage in the semiconductor industry through collaboration between industry and academia to incubate new talent.
Edge AI Application Evolution – Opportunity and Challenge
陸忠立 博士｜聯發科技 計算與人工智能技術群 本部協理
主持人: 吳安宇 博士｜台灣大學電機系 教授 (聯發科技-台灣大學創新研究中心 主任 | IEEE Fellow)
Over the years, edge AI has made significant strides, transitioning from applications like photo classification and face detection to enhancing video and gaming picture quality. The advent of generative AI has further propelled innovation, revolutionizing our life experiences. However, due to intensive computational and memory requirements, current generative AI applications primarily rely on cloud infrastructure.
In this presentation, we aim to explore the emerging trend of shifting from a cloud-centric approach to a collaborative cloud-edge paradigm for generative AI technologies. We will delve into the multitude of opportunities and challenges that lie ahead when supporting generative AI on edge devices. This transformation entails a synergetic blend of technological advancements, enhancements in hardware architecture, and the reduction of computational complexities, ultimately enabling the realization of novel generative AI applications.
In this presentation, we aim to explore the emerging trend of shifting from a cloud-centric approach to a collaborative cloud-edge paradigm for generative AI technologies. We will delve into the multitude of opportunities and challenges that lie ahead when supporting generative AI on edge devices. This transformation entails a synergetic blend of technological advancements, enhancements in hardware architecture, and the reduction of computational complexities, ultimately enabling the realization of novel generative AI applications.
Panel Discussion
Taiwan's AI Computing Journey: Challenges and Opportunities
主持人:
張世杰 博士｜工研院電光所 所長
與談人:
李鎮宜 博士｜陽明交通大學 副校長
張孟凡 博士｜台積電 處長
陸忠立 博士｜聯發科技 計算與人工智能技術群 本部協理
林志明 董事長｜晶心科技 董事長暨執行長
侯拓宏 博士｜台灣半導體研究中心 主任
報到與入場
Opening : RISC-V科技領先全球
林志明｜台灣RISC-V聯盟 會長 (晶心科技 董事長暨執行長)
RISC-V 已然與 x86、ARM分庭抗禮，成為未來數十年全球三大領先指令集之一，為嵌入式系統晶片設計師之首選；RISC-V International Association及全球菁英社群協助貢獻新規格、新指令集，推動RISC-V處理器朝向更全面性分布發展，本次演講中將說明RISC-V International Association在推出RISC-V處理器新規格與新指令集的努力與成績，討論近幾年所著墨的數項領先領域，及全球各相關廠商在推出相關處理器或系統晶片的各項應用範圍與成品；並以在推動建立更完善的 RISC-V生態系上的努力，持續達成RISC-V 科技領先全球作結論。
Welcome Remark
李志鵬 博士｜國科會工程技術研究發展處 處長
王其國 博士｜台灣物聯網產業技術協會 理事長
貴賓合影
Keynote
Lu Dai｜Board Chair, RISC V International (Senior Director, Technical Standards, Qualcomm)
RISC-V is Inevitable
Ms. Calista Redmond｜CEO, RISC-V International
RISC-V adoption has accelerated across domains, from embedded to enterprise, from automotive to HPC. RISC-V has grown faster than any other architecture in history with both technical and business advantages. We are in the era of open computing as opportunities for custom microprocessors grow exponentially and barriers to innovation and markets are overcome through collaboration. Join me to hear about the success of RISC-V across industries, geographies, and stakeholders. We’ll take a look at thought leaders ranging from multinationals to start-ups and the progress they’re making both independently and collaboratively. You’ll come away with an understanding of the technical advantages, business variables, and explosive opportunity that have compelled investment and engagement in the RISC-V community as we together drive commercialization and adoption of RISC-V everywhere.
Bridging the Divide: Unifying RISC-V through Binary Translation
Dr. Philipp Tomsich｜Technologist and Founder of VRULL(Chair of the Applications & Tools Committee, RISC-V International)
In the ever-evolving landscape of RISC-V ISA, binary translation emerges as a critical enabler for its continuous evolution and innovation, effectively managing the potential fragmentation that accompanies the introduction of new extensions and instructions. This ensures seamless backward compatibility and accelerates RISC-V adoption by offering effortless migration from legacy architectures.
Binary translation is a well-established technology with widespread high-profile implementations. Recognized as an infrastructure or "public utility," it demands open-source accessibility to maximize its benefits for the entire RISC-V community. To spearhead the development and ongoing stewardship of a free and open multi-ISA binary translation framework, we have recently launched a non-profit initiative.
Binary translation is a well-established technology with widespread high-profile implementations. Recognized as an infrastructure or "public utility," it demands open-source accessibility to maximize its benefits for the entire RISC-V community. To spearhead the development and ongoing stewardship of a free and open multi-ISA binary translation framework, we have recently launched a non-profit initiative.
Scalable RISC-V for Digital Transformation
Wei-Han, Lien｜Chief CPU Architect and Senior Fellow Architecture, Tenstorrent
The human race is entering an era in which digital technology is profoundly transforming every aspect of human life. Digital transformation refers to the use of digital technologies to revolutionize business operations and enhance customer experiences. It involves adopting innovative tools and strategies to improve efficiency, agility, and competitiveness in an increasingly digitized world. In this context, RISC-V, an open-source instruction set architecture (ISA), can play a significant role.
RISC-V offers customization, flexibility, and vendor independence, making it valuable for organizations embracing digital transformation. Its open-source nature allows businesses to design, modify, and implement processors based on RISC-V specifications without proprietary licensing constraints. This enables the creation of processors tailored to specific workloads, optimizing performance, energy efficiency, and cost-effectiveness.
By lowering entry barriers for semiconductor startups and companies, RISC-V fosters innovation and the development of specialized hardware solutions. This adaptability makes it suitable for integrating with emerging technologies like AI and IoT, making RISC-V a foundational technology for digital transformation initiatives seeking to leverage these innovations.
Tenstorrent's RISC-V processor can further enhance the digital transformation journey with its advanced capabilities and unique features. Tenstorrent develops AI processors based on the RISC-V architecture. AI is a crucial component of digital transformation, and Tenstorrent's RISC-V processor is designed to excel in handling AI workloads. Tenstorrent’s wide-range of superscalar RISC-V IP's support cloud computing/storage servers, enable edge computing for real time power-efficient processing, and support connecting IoT devices to gather data essential for digital transformation.
By combining the strengths of RISC-V with a specialized focus on AI and data processing, Tenstorrent's RISC-V processor is positioned to accelerate digital transformation initiatives. Its ability to handle AI workloads efficiently, support edge computing and IoT devices, enable data analytics, promote customization, drive innovation, and enhance security makes it a valuable asset for organizations seeking to leverage AI and data-driven insights to transform their businesses.
RISC-V offers customization, flexibility, and vendor independence, making it valuable for organizations embracing digital transformation. Its open-source nature allows businesses to design, modify, and implement processors based on RISC-V specifications without proprietary licensing constraints. This enables the creation of processors tailored to specific workloads, optimizing performance, energy efficiency, and cost-effectiveness.
By lowering entry barriers for semiconductor startups and companies, RISC-V fosters innovation and the development of specialized hardware solutions. This adaptability makes it suitable for integrating with emerging technologies like AI and IoT, making RISC-V a foundational technology for digital transformation initiatives seeking to leverage these innovations.
Tenstorrent's RISC-V processor can further enhance the digital transformation journey with its advanced capabilities and unique features. Tenstorrent develops AI processors based on the RISC-V architecture. AI is a crucial component of digital transformation, and Tenstorrent's RISC-V processor is designed to excel in handling AI workloads. Tenstorrent’s wide-range of superscalar RISC-V IP's support cloud computing/storage servers, enable edge computing for real time power-efficient processing, and support connecting IoT devices to gather data essential for digital transformation.
By combining the strengths of RISC-V with a specialized focus on AI and data processing, Tenstorrent's RISC-V processor is positioned to accelerate digital transformation initiatives. Its ability to handle AI workloads efficiently, support edge computing and IoT devices, enable data analytics, promote customization, drive innovation, and enhance security makes it a valuable asset for organizations seeking to leverage AI and data-driven insights to transform their businesses.
Extending RISC-V Intelligence from Cloud to Edge
蘇泓萌 博士｜晶心科技 總經理暨技術長
Equipped with RISC-V's powerful Vector ISA and automated customer extension framework, Andes solutions have been adopted in over a dozen innovated datacenter AI/ML accelerators such as Meta’s MTIA first generation silicon. At the same time, the needs for intelligence or more intelligence are fast rising in many edge applications such as ADAS, AR/VR, 5G base stations, SSD Storage, and even general-purpose MCU/MPU. AI/ML is used to improve existing features such as noise reduction for earbuds and picture enhancement for image sensor processors as well as to apply to new areas such as 5G network optimizations.
In this talk, we will discuss the rising demands for intelligence everywhere, and illustrate existing solutions for the Cloud AI and how they are being adopted in the edge applications, using AndesAIRE™ (Andes AI Runs Everywhere) solutions as an example.
In this talk, we will discuss the rising demands for intelligence everywhere, and illustrate existing solutions for the Cloud AI and how they are being adopted in the edge applications, using AndesAIRE™ (Andes AI Runs Everywhere) solutions as an example.
人工智慧與汽車產業的趨勢：個性化、隱私、數據保護和 RISC-V 上的 LLM
魏國章｜臺灣發展軟體科技股份有限公司 行銷長暨執行副總
人工智能與汽車行業正經歷著重大的轉型。在汽車領域，人工智能被應用於提升車輛的安全性、效率和舒適性，同時還用于為駕駛員和乘客打造個性化的全新體驗。另外，汽車行業一直在努力將汽車轉變為具備人工智能功能的軟體定義車輛（SDV）。
人工智能領域的最新趨勢是將大型語言模型（LLMs）和基礎模型作為下一代人工智能基礎架構，用于為AI SoC（系統芯片）提供先進功能。LLMs經過大規模的文本和代碼數據集的訓練，能夠執行廣泛的任務，甚至具備推理能力。使用RISC-V來運行LLMs的AI SoC的一個優勢是它是一種開放架構。這意味著它不受單一公司控制，使其更加安全、可靠，並具有設計自由。
在開發由人工智能驅動的汽車時，其中一個關鍵挑戰是保護用戶的隱私和數據。隨著車輛收集越來越多關於周圍環境和乘客的數據，確保這些數據得到安全保護並避免被濫用顯得非常重要。
在本次演講中，我們將討論人工智能與汽車領域的最新趨勢，重点關注個性化、隱私和數據保護。同時，我們還將探討使用RISC-V來運行LLMs的AI SoC的優勢。
關鍵詞：人工智能、汽車、LLM、RISC-V、隱私、數據保護
人工智能領域的最新趨勢是將大型語言模型（LLMs）和基礎模型作為下一代人工智能基礎架構，用于為AI SoC（系統芯片）提供先進功能。LLMs經過大規模的文本和代碼數據集的訓練，能夠執行廣泛的任務，甚至具備推理能力。使用RISC-V來運行LLMs的AI SoC的一個優勢是它是一種開放架構。這意味著它不受單一公司控制，使其更加安全、可靠，並具有設計自由。
在開發由人工智能驅動的汽車時，其中一個關鍵挑戰是保護用戶的隱私和數據。隨著車輛收集越來越多關於周圍環境和乘客的數據，確保這些數據得到安全保護並避免被濫用顯得非常重要。
在本次演講中，我們將討論人工智能與汽車領域的最新趨勢，重点關注個性化、隱私和數據保護。同時，我們還將探討使用RISC-V來運行LLMs的AI SoC的優勢。
關鍵詞：人工智能、汽車、LLM、RISC-V、隱私、數據保護
中場
Panel Discussion
主持人:
陳添福 教授｜國立陽明交通大學資訊學院 副院長 / 教授
與談人:
Dr. Philipp Tomsich｜Founder and Chief Technologist, VRULL
Mr. Wei-Han, Lien｜Chief CPU Architect and Senior Fellow Architecture, Tenstorrent
蘇泓萌 博士｜晶心科技 總經理暨技術長
賴俊豪｜臺灣發展軟體科技股份有限公司 董事長
李新基｜台灣新思科技股份有限公司系統設計事業群 副總經理
王成淵｜聯華電子市場行銷處 執行處長
賦歸與交流
